Rustup to rustc 1.53.0-nightly (132b4e5d1
2021-04-13)
This commit is contained in:
parent
607ed9190f
commit
73c0db092d
8 changed files with 84 additions and 82 deletions
15
build_sysroot/Cargo.lock
generated
15
build_sysroot/Cargo.lock
generated
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@ -56,7 +56,7 @@ dependencies = [
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[[package]]
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name = "compiler_builtins"
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version = "0.1.39"
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version = "0.1.40"
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dependencies = [
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"rustc-std-workspace-core",
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]
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@ -167,6 +167,7 @@ dependencies = [
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name = "panic_abort"
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version = "0.0.0"
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dependencies = [
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"alloc",
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"cfg-if",
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"compiler_builtins",
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"core",
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@ -242,10 +243,22 @@ dependencies = [
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"panic_abort",
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"panic_unwind",
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"rustc-demangle",
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"std_detect",
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"unwind",
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"wasi",
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]
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[[package]]
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name = "std_detect"
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version = "0.1.5"
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dependencies = [
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"cfg-if",
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"compiler_builtins",
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"libc",
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"rustc-std-workspace-alloc",
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"rustc-std-workspace-core",
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]
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[[package]]
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name = "sysroot"
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version = "0.0.0"
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@ -32,7 +32,7 @@ popd
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git clone https://github.com/rust-lang/compiler-builtins.git || echo "rust-lang/compiler-builtins has already been cloned"
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pushd compiler-builtins
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git checkout -- .
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git checkout 0.1.39
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git checkout 0.1.40
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git apply ../../crate_patches/000*-compiler-builtins-*.patch
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popd
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@ -17,8 +17,8 @@ index 06054c8..3bea17b 100644
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fn wrapping_shr(self, other: u32) -> Self;
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- fn rotate_left(self, other: u32) -> Self;
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fn overflowing_add(self, other: Self) -> (Self, bool);
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fn aborting_div(self, other: Self) -> Self;
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fn aborting_rem(self, other: Self) -> Self;
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fn leading_zeros(self) -> u32;
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}
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@@ -209,10 +208,6 @@ macro_rules! int_impl_common {
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<Self>::wrapping_shr(self, other)
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}
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@ -1,3 +1,3 @@
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[toolchain]
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channel = "nightly-2021-04-07"
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channel = "nightly-2021-04-14"
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components = ["rust-src", "rustc-dev", "llvm-tools-preview"]
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82
src/base.rs
82
src/base.rs
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@ -744,85 +744,15 @@ fn codegen_stmt<'tcx>(
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| StatementKind::AscribeUserType(..) => {}
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StatementKind::LlvmInlineAsm(asm) => {
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use rustc_span::symbol::Symbol;
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let LlvmInlineAsm { asm, outputs, inputs } = &**asm;
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let rustc_hir::LlvmInlineAsmInner {
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asm: asm_code, // Name
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outputs: output_names, // Vec<LlvmInlineAsmOutput>
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inputs: input_names, // Vec<Name>
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clobbers, // Vec<Name>
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volatile, // bool
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alignstack, // bool
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dialect: _,
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asm_str_style: _,
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} = asm;
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match asm_code.as_str().trim() {
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match asm.asm.asm.as_str().trim() {
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"" => {
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// Black box
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}
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"mov %rbx, %rsi\n cpuid\n xchg %rbx, %rsi" => {
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assert_eq!(input_names, &[Symbol::intern("{eax}"), Symbol::intern("{ecx}")]);
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assert_eq!(output_names.len(), 4);
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for (i, c) in (&["={eax}", "={esi}", "={ecx}", "={edx}"]).iter().enumerate() {
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assert_eq!(&output_names[i].constraint.as_str(), c);
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assert!(!output_names[i].is_rw);
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assert!(!output_names[i].is_indirect);
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}
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assert_eq!(clobbers, &[]);
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assert!(!volatile);
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assert!(!alignstack);
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assert_eq!(inputs.len(), 2);
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let leaf = codegen_operand(fx, &inputs[0].1).load_scalar(fx); // %eax
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let subleaf = codegen_operand(fx, &inputs[1].1).load_scalar(fx); // %ecx
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let (eax, ebx, ecx, edx) =
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crate::intrinsics::codegen_cpuid_call(fx, leaf, subleaf);
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assert_eq!(outputs.len(), 4);
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codegen_place(fx, outputs[0])
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.write_cvalue(fx, CValue::by_val(eax, fx.layout_of(fx.tcx.types.u32)));
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codegen_place(fx, outputs[1])
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.write_cvalue(fx, CValue::by_val(ebx, fx.layout_of(fx.tcx.types.u32)));
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codegen_place(fx, outputs[2])
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.write_cvalue(fx, CValue::by_val(ecx, fx.layout_of(fx.tcx.types.u32)));
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codegen_place(fx, outputs[3])
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.write_cvalue(fx, CValue::by_val(edx, fx.layout_of(fx.tcx.types.u32)));
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}
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"xgetbv" => {
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assert_eq!(input_names, &[Symbol::intern("{ecx}")]);
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assert_eq!(output_names.len(), 2);
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for (i, c) in (&["={eax}", "={edx}"]).iter().enumerate() {
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assert_eq!(&output_names[i].constraint.as_str(), c);
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assert!(!output_names[i].is_rw);
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assert!(!output_names[i].is_indirect);
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}
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assert_eq!(clobbers, &[]);
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assert!(!volatile);
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assert!(!alignstack);
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crate::trap::trap_unimplemented(fx, "_xgetbv arch intrinsic is not supported");
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}
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// ___chkstk, ___chkstk_ms and __alloca are only used on Windows
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_ if fx.tcx.symbol_name(fx.instance).name.starts_with("___chkstk") => {
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crate::trap::trap_unimplemented(fx, "Stack probes are not supported");
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}
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_ if fx.tcx.symbol_name(fx.instance).name == "__alloca" => {
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crate::trap::trap_unimplemented(fx, "Alloca is not supported");
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}
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// Used in sys::windows::abort_internal
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"int $$0x29" => {
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crate::trap::trap_unimplemented(fx, "Windows abort");
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}
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_ => fx
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.tcx
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.sess
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.span_fatal(stmt.source_info.span, "Inline assembly is not supported"),
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_ => fx.tcx.sess.span_fatal(
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stmt.source_info.span,
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"Legacy `llvm_asm!` inline assembly is not supported. \
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Try using the new `asm!` instead.",
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),
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}
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}
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StatementKind::Coverage { .. } => fx.tcx.sess.fatal("-Zcoverage is unimplemented"),
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@ -24,6 +24,64 @@ pub(crate) fn codegen_inline_asm<'tcx>(
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let true_ = fx.bcx.ins().iconst(types::I32, 1);
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fx.bcx.ins().trapnz(true_, TrapCode::User(1));
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return;
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} else if template[0] == InlineAsmTemplatePiece::String("mov rsi, rbx".to_string())
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&& template[1] == InlineAsmTemplatePiece::String("\n".to_string())
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&& template[2] == InlineAsmTemplatePiece::String("cpuid".to_string())
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&& template[3] == InlineAsmTemplatePiece::String("\n".to_string())
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&& template[4] == InlineAsmTemplatePiece::String("xchg rsi, rbx".to_string())
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{
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assert_eq!(operands.len(), 4);
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let (leaf, eax_place) = match operands[0] {
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InlineAsmOperand::InOut { reg, late: true, ref in_value, out_place } => {
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let reg = expect_reg(reg);
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assert_eq!(reg, InlineAsmReg::X86(X86InlineAsmReg::ax));
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(
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crate::base::codegen_operand(fx, in_value).load_scalar(fx),
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crate::base::codegen_place(fx, out_place.unwrap()),
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)
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}
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_ => unreachable!(),
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};
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let ebx_place = match operands[1] {
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InlineAsmOperand::Out { reg, late: true, place } => {
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let reg = expect_reg(reg);
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assert_eq!(reg, InlineAsmReg::X86(X86InlineAsmReg::si));
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crate::base::codegen_place(fx, place.unwrap())
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}
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_ => unreachable!(),
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};
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let (sub_leaf, ecx_place) = match operands[2] {
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InlineAsmOperand::InOut { reg, late: true, ref in_value, out_place } => {
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let reg = expect_reg(reg);
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assert_eq!(reg, InlineAsmReg::X86(X86InlineAsmReg::cx));
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(
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crate::base::codegen_operand(fx, in_value).load_scalar(fx),
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crate::base::codegen_place(fx, out_place.unwrap()),
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)
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}
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_ => unreachable!(),
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};
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let edx_place = match operands[3] {
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InlineAsmOperand::Out { reg, late: true, place } => {
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let reg = expect_reg(reg);
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assert_eq!(reg, InlineAsmReg::X86(X86InlineAsmReg::dx));
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crate::base::codegen_place(fx, place.unwrap())
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}
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_ => unreachable!(),
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};
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let (eax, ebx, ecx, edx) = crate::intrinsics::codegen_cpuid_call(fx, leaf, sub_leaf);
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eax_place.write_cvalue(fx, CValue::by_val(eax, fx.layout_of(fx.tcx.types.u32)));
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ebx_place.write_cvalue(fx, CValue::by_val(ebx, fx.layout_of(fx.tcx.types.u32)));
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ecx_place.write_cvalue(fx, CValue::by_val(ecx, fx.layout_of(fx.tcx.types.u32)));
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edx_place.write_cvalue(fx, CValue::by_val(edx, fx.layout_of(fx.tcx.types.u32)));
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return;
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} else if fx.tcx.symbol_name(fx.instance).name.starts_with("___chkstk") {
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// ___chkstk, ___chkstk_ms and __alloca are only used on Windows
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crate::trap::trap_unimplemented(fx, "Stack probes are not supported");
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} else if fx.tcx.symbol_name(fx.instance).name == "__alloca" {
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crate::trap::trap_unimplemented(fx, "Alloca is not supported");
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}
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let mut slot_size = Size::from_bytes(0);
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@ -8,7 +8,7 @@ use crate::prelude::*;
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pub(crate) fn codegen_cpuid_call<'tcx>(
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fx: &mut FunctionCx<'_, '_, 'tcx>,
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leaf: Value,
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_subleaf: Value,
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_sub_leaf: Value,
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) -> (Value, Value, Value, Value) {
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let leaf_0 = fx.bcx.create_block();
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let leaf_1 = fx.bcx.create_block();
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@ -13,6 +13,7 @@ pub(crate) fn get_clif_linkage(
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(RLinkage::External, Visibility::Default) => Linkage::Export,
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(RLinkage::Internal, Visibility::Default) => Linkage::Local,
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(RLinkage::External, Visibility::Hidden) => Linkage::Hidden,
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(RLinkage::WeakAny, Visibility::Default) => Linkage::Preemptible,
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_ => panic!("{:?} = {:?} {:?}", mono_item, linkage, visibility),
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}
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}
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