From ab93a139ef110f977f08d5bedc744654efe729f6 Mon Sep 17 00:00:00 2001 From: Alessandro Decina Date: Sat, 29 May 2021 22:21:23 +1000 Subject: [PATCH] BPF: misc minor review fixes --- compiler/rustc_target/src/spec/bpf_base.rs | 4 ++++ src/bootstrap/native.rs | 4 ++-- src/doc/unstable-book/src/library-features/asm.md | 6 +++--- src/tools/compiletest/src/runtest.rs | 4 ---- src/tools/compiletest/src/util.rs | 4 ++-- 5 files changed, 11 insertions(+), 11 deletions(-) diff --git a/compiler/rustc_target/src/spec/bpf_base.rs b/compiler/rustc_target/src/spec/bpf_base.rs index f8322567a8d..764cc735d75 100644 --- a/compiler/rustc_target/src/spec/bpf_base.rs +++ b/compiler/rustc_target/src/spec/bpf_base.rs @@ -12,6 +12,10 @@ pub fn opts(endian: Endian) -> TargetOptions { no_builtins: true, panic_strategy: PanicStrategy::Abort, position_independent_executables: true, + // Disable MergeFunctions since: + // - older kernels don't support bpf-to-bpf calls + // - on newer kernels, userspace still needs to relocate before calling + // BPF_PROG_LOAD and not all BPF libraries do that yet merge_functions: MergeFunctions::Disabled, obj_is_bitcode: true, requires_lto: false, diff --git a/src/bootstrap/native.rs b/src/bootstrap/native.rs index 49bbcb4d612..be78b2829fc 100644 --- a/src/bootstrap/native.rs +++ b/src/bootstrap/native.rs @@ -235,8 +235,8 @@ impl Step for Llvm { let llvm_targets = match &builder.config.llvm_targets { Some(s) => s, None => { - "AArch64;ARM;Hexagon;MSP430;Mips;NVPTX;PowerPC;RISCV;\ - Sparc;SystemZ;WebAssembly;X86;BPF" + "AArch64;ARM;BPF;Hexagon;MSP430;Mips;NVPTX;PowerPC;RISCV;\ + Sparc;SystemZ;WebAssembly;X86" } }; diff --git a/src/doc/unstable-book/src/library-features/asm.md b/src/doc/unstable-book/src/library-features/asm.md index 77080b54dc8..03dbf4fb617 100644 --- a/src/doc/unstable-book/src/library-features/asm.md +++ b/src/doc/unstable-book/src/library-features/asm.md @@ -571,8 +571,8 @@ Here is the list of currently supported register classes: | PowerPC | `reg_nonzero` | | `r[1-31]` | `b` | | PowerPC | `freg` | `f[0-31]` | `f` | | wasm32 | `local` | None\* | `r` | -| BPF | `reg` | `r[0-10]` | `r`| -| BPF | `wreg` | `w[0-10]` | `w`| +| BPF | `reg` | `r[0-10]` | `r` | +| BPF | `wreg` | `w[0-10]` | `w` | > **Note**: On x86 we treat `reg_byte` differently from `reg` because the compiler can allocate `al` and `ah` separately whereas `reg` reserves the whole register. > @@ -619,7 +619,7 @@ Each register class has constraints on which value types they can be used with. | PowerPC | `freg` | None | `f32`, `f64` | | wasm32 | `local` | None | `i8` `i16` `i32` `i64` `f32` `f64` | | BPF | `reg` | None | `i8` `i16` `i32` `i64` | -| BPF | `wreg` | `alu32` | `i8` `i16` `i32`| +| BPF | `wreg` | `alu32` | `i8` `i16` `i32` | > **Note**: For the purposes of the above table pointers, function pointers and `isize`/`usize` are treated as the equivalent integer type (`i16`/`i32`/`i64` depending on the target). diff --git a/src/tools/compiletest/src/runtest.rs b/src/tools/compiletest/src/runtest.rs index f5095486d1a..e3e54894038 100644 --- a/src/tools/compiletest/src/runtest.rs +++ b/src/tools/compiletest/src/runtest.rs @@ -2311,10 +2311,6 @@ impl<'test> TestCx<'test> { // No extra flags needed. } - Some("bpf-linker") => { - rustc.arg("-Clink-args=--emit=asm"); - } - Some(_) => self.fatal("unknown 'assembly-output' header"), None => self.fatal("missing 'assembly-output' header"), } diff --git a/src/tools/compiletest/src/util.rs b/src/tools/compiletest/src/util.rs index 238f4f7ae66..37164c4e575 100644 --- a/src/tools/compiletest/src/util.rs +++ b/src/tools/compiletest/src/util.rs @@ -48,8 +48,8 @@ const ARCH_TABLE: &[(&str, &str)] = &[ ("armv7s", "arm"), ("asmjs", "asmjs"), ("avr", "avr"), - ("bpfeb", "bpfeb"), - ("bpfel", "bpfel"), + ("bpfeb", "bpf"), + ("bpfel", "bpf"), ("hexagon", "hexagon"), ("i386", "x86"), ("i586", "x86"),