From 1ad37804a62ef2a1a8f613cca349bacc8fb510f0 Mon Sep 17 00:00:00 2001
From: Camille GILLOT <gillot.camille@gmail.com>
Date: Wed, 24 May 2023 18:24:25 +0000
Subject: [PATCH] Remove brittle test.

---
 .../checked_ops.ilog2.PreCodegen.after.mir    | 41 -------------------
 tests/mir-opt/pre-codegen/checked_ops.rs      |  5 ---
 2 files changed, 46 deletions(-)
 delete mode 100644 tests/mir-opt/pre-codegen/checked_ops.ilog2.PreCodegen.after.mir

diff --git a/tests/mir-opt/pre-codegen/checked_ops.ilog2.PreCodegen.after.mir b/tests/mir-opt/pre-codegen/checked_ops.ilog2.PreCodegen.after.mir
deleted file mode 100644
index 12be98640a7..00000000000
--- a/tests/mir-opt/pre-codegen/checked_ops.ilog2.PreCodegen.after.mir
+++ /dev/null
@@ -1,41 +0,0 @@
-// MIR for `ilog2` after PreCodegen
-
-fn ilog2(_1: u32) -> u32 {
-    debug x => _1;                       // in scope 0 at $DIR/checked_ops.rs:+0:14: +0:15
-    let mut _0: u32;                     // return place in scope 0 at $DIR/checked_ops.rs:+0:25: +0:28
-    scope 1 (inlined #[track_caller] core::num::<impl u32>::ilog2) { // at $DIR/checked_ops.rs:21:7: 21:14
-        debug self => _1;                // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        let mut _2: std::option::Option<u32>; // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        let mut _3: isize;               // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        let mut _4: !;                   // in scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        scope 2 {
-            debug log => _0;             // in scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        }
-    }
-
-    bb0: {
-        StorageLive(_2);                 // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        _2 = core::num::<impl u32>::checked_ilog2(_1) -> bb1; // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-                                         // mir::Constant
-                                         // + span: $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-                                         // + literal: Const { ty: fn(u32) -> Option<u32> {core::num::<impl u32>::checked_ilog2}, val: Value(<ZST>) }
-    }
-
-    bb1: {
-        _3 = discriminant(_2);           // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        switchInt(move _3) -> [1: bb2, otherwise: bb3]; // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-    }
-
-    bb2: {
-        _0 = ((_2 as Some).0: u32);      // scope 2 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        StorageDead(_2);                 // scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-        return;                          // scope 0 at $DIR/checked_ops.rs:+2:2: +2:2
-    }
-
-    bb3: {
-        _4 = core::num::int_log10::panic_for_nonpositive_argument(); // scope 1 at $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-                                         // mir::Constant
-                                         // + span: $SRC_DIR/core/src/num/uint_macros.rs:LL:COL
-                                         // + literal: Const { ty: fn() -> ! {core::num::int_log10::panic_for_nonpositive_argument}, val: Value(<ZST>) }
-    }
-}
diff --git a/tests/mir-opt/pre-codegen/checked_ops.rs b/tests/mir-opt/pre-codegen/checked_ops.rs
index 47681c5fa20..dee43b0c6f8 100644
--- a/tests/mir-opt/pre-codegen/checked_ops.rs
+++ b/tests/mir-opt/pre-codegen/checked_ops.rs
@@ -15,8 +15,3 @@ pub fn step_forward(x: u32, n: usize) -> u32 {
 pub fn checked_shl(x: u32, rhs: u32) -> Option<u32> {
     x.checked_shl(rhs)
 }
-
-// EMIT_MIR checked_ops.ilog2.PreCodegen.after.mir
-pub fn ilog2(x: u32) -> u32 {
-    x.ilog2()
-}