diff --git a/kernel/src/sys/acpica_osl.rs b/kernel/src/sys/acpica_osl.rs
index 3435ab8..4c6f1bc 100644
--- a/kernel/src/sys/acpica_osl.rs
+++ b/kernel/src/sys/acpica_osl.rs
@@ -5,9 +5,12 @@ use core::{
     sync::atomic::Ordering,
 };
 
-use acpica_rs::{ACPI_PHYSICAL_ADDRESS, ACPI_PREDEFINED_NAMES, ACPI_SIZE, ACPI_STATUS, ACPI_STRING, ACPI_TABLE_HEADER, UINT16, UINT32, UINT64};
+use acpica_rs::{ACPI_IO_ADDRESS, ACPI_PHYSICAL_ADDRESS, ACPI_PREDEFINED_NAMES, ACPI_SIZE, ACPI_STATUS, ACPI_STRING, ACPI_TABLE_HEADER, UINT16, UINT32, UINT64, UINT8};
 use alloc::{boxed::Box, sync::Arc};
-use kernel_common::log::log_raw;
+use kernel_common::{
+    ioports::{inb, inl, inw, outb, outl, outw},
+    log::log_raw,
+};
 
 use crate::{
     cpu::paging::{map_physical, unmap_physical},
@@ -61,6 +64,10 @@ extern "C" fn AcpiOsDeleteSemaphore() {
     panic!("Unimplemented");
 }
 #[no_mangle]
+extern "C" fn AcpiOsEnterSleep(_sleep_state: UINT8, _reg_a_val: UINT32, _reg_b_val: UINT32) -> ACPI_STATUS {
+    AE_OK
+}
+#[no_mangle]
 extern "C" fn AcpiOsExecute() {
     panic!("Unimplemented");
 }
@@ -129,8 +136,17 @@ extern "C" fn AcpiOsReadPciConfiguration() {
     panic!("Unimplemented");
 }
 #[no_mangle]
-extern "C" fn AcpiOsReadPort() {
-    panic!("Unimplemented");
+extern "C" fn AcpiOsReadPort(address: ACPI_IO_ADDRESS, value: *mut UINT32, width: UINT32) -> ACPI_STATUS {
+    let address = address as u16;
+    unsafe {
+        match width {
+            8 => *value = inb(address) as UINT32,
+            16 => *value = inw(address) as UINT32,
+            32 => *value = inl(address),
+            _ => panic!("Unsupported width"),
+        }
+    }
+    AE_OK
 }
 #[no_mangle]
 extern "C" fn AcpiOsReleaseLock(handle: *mut c_void, _cpu_flags: ACPI_SIZE) {
@@ -209,6 +225,15 @@ extern "C" fn AcpiOsWritePciConfiguration() {
     panic!("Unimplemented");
 }
 #[no_mangle]
-extern "C" fn AcpiOsWritePort() {
-    panic!("Unimplemented");
+extern "C" fn AcpiOsWritePort(address: ACPI_IO_ADDRESS, value: UINT32, width: UINT32) -> ACPI_STATUS {
+    let address = address as u16;
+    unsafe {
+        match width {
+            8 => outb(address, value as u8),
+            16 => outw(address, value as u16),
+            32 => outl(address, value),
+            _ => panic!("Unsupported width"),
+        }
+    }
+    AE_OK
 }
diff --git a/lib/kernel-common/src/ioports.rs b/lib/kernel-common/src/ioports.rs
index 3bca0e6..f258800 100644
--- a/lib/kernel-common/src/ioports.rs
+++ b/lib/kernel-common/src/ioports.rs
@@ -1,7 +1,38 @@
 use core::arch::asm;
 
+pub unsafe fn inb(port: u16) -> u8 {
+    let value;
+    unsafe {
+        asm!("in al, dx", in("dx") port, out("al") value);
+    }
+    value
+}
 pub unsafe fn outb(port: u16, value: u8) {
     unsafe {
         asm!("out dx, al", in("al") value, in("dx") port);
     }
 }
+pub unsafe fn inw(port: u16) -> u16 {
+    let value;
+    unsafe {
+        asm!("in ax, dx", in("dx") port, out("ax") value);
+    }
+    value
+}
+pub unsafe fn outw(port: u16, value: u16) {
+    unsafe {
+        asm!("out dx, ax", in("ax") value, in("dx") port);
+    }
+}
+pub unsafe fn inl(port: u16) -> u32 {
+    let value;
+    unsafe {
+        asm!("in eax, dx", in("dx") port, out("eax") value);
+    }
+    value
+}
+pub unsafe fn outl(port: u16, value: u32) {
+    unsafe {
+        asm!("out dx, eax", in("eax") value, in("dx") port);
+    }
+}