Add exception handlers

kernel/src/cpu/isr.rs

@@ -1,6 +1,74 @@
 use core::arch::global_asm;
 
+use log::warn;
+
 global_asm!(include_str!("isr.s"), options(att_syntax));
 
+#[repr(C)]
+struct ISRState {
+    rax: u64,
+    rbx: u64,
+    rcx: u64,
+    rdx: u64,
+    rdi: u64,
+    rsi: u64,
+    rbp: u64,
+    r8: u64,
+    r9: u64,
+    r10: u64,
+    r11: u64,
+    r12: u64,
+    r13: u64,
+    r14: u64,
+    r15: u64,
+    isr: u64,
+    error_code: u64,
+    rip: u64,
+    cs: u64,
+    rflags: u64,
+    rsp: u64,
+    ss: u64,
+}
+
+const EXCEPTIONS: [&str; 32] = [
+    "Division Error",
+    "Debug",
+    "Non-maskable Interrupt",
+    "Breakpoint",
+    "Overflow",
+    "Bound Range Exceeded",
+    "Invalid Opcode",
+    "Device Not Available",
+    "Double Fault",
+    "Coprocessor Segment Overrun",
+    "Invalid TSS",
+    "Segment Not Present",
+    "Stack-Segment Fault",
+    "General Protection Fault",
+    "Page Fault",
+    "Reserved",
+    "x87 Floating-Point Exception",
+    "Alignment Check",
+    "Machine Check",
+    "SIMD Floating-Point Exception",
+    "Virtualization Exception",
+    "Control Protection Exception",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Reserved",
+    "Hypervisor Injection Exception",
+    "VMM Communication Exception",
+    "Security Exception",
+    "Reserved",
+];
+
 #[no_mangle]
-extern "C" fn isr_handler() {}
+extern "C" fn isr_handler(state: ISRState) {
+    if state.isr < 32 {
+        panic!("Exception: {}", EXCEPTIONS[state.isr as usize]);
+    }
+    warn!("Unhandled interrupt: {}", state.isr);
+}

kernel/src/cpu/isr.s

@@ -29,6 +29,7 @@ isr_common:
   push %rcx
   push %rbx
   push %rax
+  mov %rsp, %rdi
 
   call isr_handler